1. Technical Field
The disclosure relates to a semiconductor structure and a method for manufacturing the same. More particularly, the disclosure relates to a three-dimensional (3-D) memory semiconductor structure and a method for manufacturing the same.
2. Description of the Related Art
Semiconductor devices have become denser and smaller. 3-D memories, going with the trend, have been developed.
In a typical 3-D memory semiconductor structure, the gate oxide for the string select structure and the ground select structure is an oxide-nitride-oxide (ONO) multilayer or an oxide-nitride-oxide-nitride-oxide (ONONO) multilayer, which is also used in the memory cells. As such, during the program/erase of the memory cells, the gate oxide for the string select structure and the ground select structure may also be charged. Thus, an extra circuitry is needed to control program/erase of the gate oxide for the string select structure and the ground select structure. Further, since the ONO multilayer or the ONONO multilayer is thick, it is somewhat difficult to control a NAND string channel.
Besides, in a typical 3-D memory semiconductor structure, bit line pad resistance may be large. As such, a layer-by-layer implantation process is needed. However, this process is expensive, and the process window thereof is narrow.